What is power planning?
- In power planning power grid network is created to distribute power to each part of the design equally.
- It is used to provide power to macros and standard cells within the IR-drop limit.
- Power planning can be done manually as well as automatically through the tool.
Inputs and Outputs of powerplanning
Inputs
- Database with valid floorplan.
- Power ring and power straps width.
- Spacing between VDD and VSS straps.
- Power layer selection.
Outputs
- Design with power structure.
Power Management
Three level of power distribution.
Ring:- Carries VDD and VSS around the chip.
Straps:- Carries VDD and VSS from the ring.
Rails:- Connect VDD and VSS to the standard cell’s VDD and VSS.
Power planning management can be divided in two category.
- Core cell power management
- Power ring are formed around the core.
- If any macro/IP is power critical than create separate power ring for particular macro/IP.
- Number of straps are created based on power requirement.
- I/O cell power management
- IO cell power planning power rings are formed for I/O cells and trunks are created between core power ring and power pads.
IR Drop Analysis
- The power supply in chip is distributed uniformly through metal layer (VDD and VSS) across the design, these metal layer have finite amount of resistance.
- When voltage is applied to this metal wires current start flowing through the metal layer and some voltage is dropped due to that resistance of metal wire and current. This drop is called as IR drop.
- This result in increase noise and poor performance.
- More IR drop = Delay increases.
Different Type of IR Analysis.
Static IR Drop:- Independent of the cell switching the drop is calculated with the help of wire resistance.
- Technique to improve static IR drop
- Width of the wire increase.
- Increase the no. of wires.
Dynamic IR Drop:- IR drop is calculated with the help of the switching of the cells.
- Technique to improve dynamic IR drop
- Placing DCAP cells.
- Increase the no. of straps.
Electromigration
- Electromigration (EM) is generally considered to be the result of momentum transfer from the electrons due to high current density.
- Atoms get displaced from their original position causing voids(opens) & hillocks(shorts) in the metal layer.
- Heating also accelerates EM because higher temperatures cause a higher number of metal ions to diffuse.
Technique to solve EM
- Increase the width of the wire.
- Buffer insertion.
- Downsize the driver.
- Switch the net to higher metal layer.
After powerplan checklist
- All Power/Ground supplies are defined separately ?
- Is IR drop acceptable ?
- IS power supply uniform in the corners ?
- Are special cells added ?
- Any power related shorts/Opens in the design ?
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Disclaimer:-
The content on this blog is contributed/derived from various sources. If you feel that there is any copy right violation please leave a comment and it will be removed. :)
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Disclaimer:-
The content on this blog is contributed/derived from various sources. If you feel that there is any copy right violation please leave a comment and it will be removed. :)
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How to check power related open/shorts..?
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